1. Field of the Invention
The present invention relates to a group III nitride compound semiconductor light-emitting device in which the contact resistance of an n-electrode is reduced, and a method for producing the same.
2. Description of the Related Art
As a structure of a group III nitride compound semiconductor light-emitting device, a structure is widely known in which an n-type layer is exposed by etching a group III nitride compound semiconductor layer and an n-electrode is formed on the exposed n-type layer.
It is shown in Japanese Unexamined Patent Application Publication No. 11-191635 that the contact resistance of an n-type layer can be reduced and the occurrence of cracks in the n-type layer can be suppressed by forming the n-type layer in such a way that it has a two-layered structure comprising, in order from a substrate, a first layer and a second layer, by making the n-type impurity concentration of the second layer higher than that of the first layer, and by forming an n-electrode on the second layer.
In addition, it is shown in Japanese Unexamined Patent Application Publication No. 2000-332292 that the current diffusivity can be improved by forming an n-type layer in such a way that it has a three-layered structure comprising, in order from a substrate, a first layer, a second layer and a third layer, by making the n-type impurity concentration of the second layer, which is a middle layer, higher than that of the other two layers. It is shown that an n-electrode is formed on the first layer or the second layer.
Further, in Japanese Unexamined Patent Application Publication No. 2001-244568, a method for controlling etching depth is shown in which an etching marker layer is made of a group III nitride compound semiconductor containing In, and the etching depth is controlled by detecting the change in the spectrum of plasma light emission of In.
In order to reduce the contact resistance of an n-electrode, it is desirable that the impurity concentration of an n-type layer be high. However, when the impurity concentration is high, deterioration of translucency, surface flatness and crystallinity is likely to occur. Therefore, it is desirable that the thickness of a layer having a high impurity concentration be as small as possible.
In Japanese Unexamined Patent Application Publication No. 11-191635, the above-described background is taken into consideration and an n-type layer is formed in such a way that it has a two-layered structure comprising a first layer and a second layer, in which the n-type impurity concentration of the second layer is higher, and an n-electrode is formed on the second layer. However, with regard to the second layer described in Japanese Unexamined Patent Application Publication No. 2000-332292, it cannot be said that the impurity concentration and the thinness of the second layer are sufficient to reduce the contact resistance.
Further, in a structure described in Japanese Unexamined Patent Application Publication No. 2000-332292, though the thickness of the second layer having a high impurity concentration is reduced, the n-electrode is not always formed on the second layer, and consequently, the structure does not always have low contact resistance. In addition, in the structures shown in embodiments 1 to 3 in Japanese Unexamined Patent Application Publication No. 2000-332292, the thicknesses of the second layers are equal to or less than 1% of the thicknesses of the third layers. In dry etching, which is a common method for exposing n-type layers, it is almost impossible to stop etching in a condition where the second layer is exposed, in view of the fact that an etching rate of an etching device varies (usually ±3 to 10%) over a substrate surface and among substrates.
Because of these problems, there has been a need for a structure in which an n-type layer having a high impurity concentration and that is as thin as possible is provided, and in which etching can be stopped without fail in a condition where the n-type layer is exposed.